Chip Lead, Senior Director - Astera Labs

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field 15+ years of experience across architecture, silicon design, validation, systems, or related domains Proven track record of developing large-scale chips (300mm²+) through successful tapeout Hands-on experience with 2.5D and 3D advanced packaging technologies and chiplet-based architectures Strong understanding of RTL design, design verification, DFT, and physical design flows Experience with high-speed serial interfaces such as PCIe, Ethernet, or switching architectures Demonstrated executive leadership of cross-functional technical programs with end-to-end product cycle ownership Strong communication and executive presence with the ability to influence at all levels of the organization

Product Technical Ownership Own the full technical lifecycle of the product line-architecture assumptions, design integration, validation strategy, readiness, and customer enablement Drive chip development execution from RTL to GDSII, ensuring architecture, implementation, and tapeout milestones are met Lead development of large-scale chips (300-400mm²) utilizing 2.5D/3D advanced packaging technologies and chiplet-based architectures Reduce ambiguity by translating product requirements into clear priorities, tradeoffs, and execution paths Own the Chip Tapeout and Chip signoff with full responsibility on Chip Quality. Cross-Functional Technical Leadership Anticipate challenges early, drive alignment across all engineering functions, ensuring risks, dependencies, and decisions are surfaced and resolved at the earliest Partner with design verification teams to define coverage goals, regression strategies, and sign-off criteria Collaborate with DFT teams on test architecture, scan insertion, BIST, and manufacturing test strategies Work closely with physical design teams on timing closure, power optimization, and backend execution Process Excellence & Organizational Development Establish and reinforce scalable processes, documentation, and handoffs that support company growth Provide structured, data-driven decision-making and maintain a crisp operational cadence across the product line Transform conflicts to foster a culture of ownership over ego, mentoring and elevating teams while strengthening technical judgment, accountability, and cross-functional collaboration Model steady, calm leadership, particularly in high-stakes or ambiguous situations Shape engineering culture and talent strategy to support Astera's rapid growth trajectory

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field 15+ years of experience across architecture, silicon design, validation, systems, or related domains Proven track record of developing large-scale chips (300mm²+) through successful tapeout Hands-on experience with 2.5D and 3D advanced packaging technologies and chiplet-based architectures Strong understanding of RTL design, design verification, DFT, and physical design flows Experience with high-speed serial interfaces such as PCIe, Ethernet, or switching architectures Demonstrated executive leadership of cross-functional technical programs with end-to-end product cycle ownership Strong communication and executive presence with the ability to influence at all levels of the organization