Staff/ Principal Physical Design CAD Engineer - Astera Labs

At least 3 years of experience in Physical Design, CAD, or implementation methodology Strong understanding of digital physical design concepts, including synthesis, placement, CTS, routing, timing closure, and physical verification Hands-on experience with Synopsys Fusion Compiler Experience with scripting languages such as Tcl, Python Ability to develop automation around EDA tools and large-scale design flows Good understanding of timing, power, congestion, floorplanning, and QoR analysis Strong debugging and problem-solving skills Ability to work closely with multiple engineering teams and support complex design environments High motivation to learn and apply GenAI technologies in semiconductor design flows.

The Engineer will develop, maintain, and improve CAD flows and methodologies for physical design teams, supporting advanced implementation stages from synthesis through place and route, timing closure, power optimization, and signoff readiness. Key responsibilities include: Develop and support physical design CAD flows using industry-standard EDA tools Build automation infrastructure for implementation, analysis, reporting, and debug Support design teams in areas such as synthesis, floorplanning, placement, CTS, routing, timing, power, and physical verification Create scripts and utilities to improve productivity, quality of results, and flow robustness Support and enhance flows based on Synopsys Fusion Compiler Explore and integrate GenAI solutions to accelerate debug, automate repetitive tasks, improve reporting, and enhance engineering productivity Analyze tool results, logs, QoR metrics, timing reports, congestion, utilization, power, and design-rule issues

At least 3 years of experience in Physical Design, CAD, or implementation methodology Strong understanding of digital physical design concepts, including synthesis, placement, CTS, routing, timing closure, and physical verification Hands-on experience with Synopsys Fusion Compiler Experience with scripting languages such as Tcl, Python Ability to develop automation around EDA tools and large-scale design flows Good understanding of timing, power, congestion, floorplanning, and QoR analysis Strong debugging and problem-solving skills Ability to work closely with multiple engineering teams and support complex design environments High motivation to learn and apply GenAI technologies in semiconductor design flows.